Loom

Welcome to Loom’s documentation!

Loom is an end to end circuit design toolset, including synthesis, simulation, verification, and visualization. Loom compiles your functional specification directly to layout. The compilation algorithms produce results that are correct by construction. Furthermore, Loom synthesizes Quasi-Delay Insensitive circuits. This is a circuit family that makes the fewest possible timing assumptions. In the end this allows people to design circuits using standard programming language constructs then compile them straight to layout without worrying about functional or timing verification.